Digital Modules

The 16-bit digital I/O module sites will accept a TTL ribbon cable connector or one of the 2×2.6in form factor modules listed below. The module sites use Altera PLDs to perform optional clock and MSB inversion, muxing/demuxing of data bits, and stripping off time code bits to be processed by the DSP controllers. The standard FPGA program supports 1,4,8, or 16 bit data words. If an ICE-A2D or ICE-D2E is connected, the FPGA is also used generate a sampling clock if not supplied externally. Dual module sites are clocked independently to allow for short/long term clock skew or different sampling rates. They may also be locked to either one of the sources. For mechanical reasons, the ECL output modules use the external sync/clock signal from the motherboard or an internally generated clock.

If you need to remove an I/O module on a ICE-PIC card please click here for instructions. For specific measurements for PIC5XL I/O modules please click here.

DIGITAL MODULES

ICE-D2E-r5 - Differential ECL Output Module - $250.00 In Production

  • One 16-bit Standard TTL to F100K Differential ECL converter
  • Use part# ICE-D2E-r5 when ordering for PIC5 or PIC6 series Cards 


ICE-D2LV-r5 - LVDS Output Module - $250.00 In Production

  • One 16-bit plus clock Standard TTL  to LVDS converter
  • Interfaces to both 5V and 3.3V powered LVDS line receivers
  • Use part# ICE-D2LV-r5 when ordering for PIC5 or PIC6 series cards


ICE-DR2D - Differential Receiver Input Module - $250.00 In Production

  • 16 Differential Data Lines + 1 Differential Clock Line
  • -4 V to 5 V Common-Mode Input Voltage Range
  • For Use With Most Differential Signals-PECL, ECL, LVPECL, LVECL, LVDS, TTL, etc
  • Accepts SDR clock Rates up to 100Mhz
  • Special ICE Mode Allows For DDR Operation (Clocking On Rising & Fallinge Clock Edges)
  • For use with PIC5XL or PIC6


ICE-LV2D-r5 - LVDS Input Module - $250.00 In Production

  • One 16-bit plus clock convert from LVDS to Standard TTL converter
  • Interfaces to both 5V and 3.3V powered LVDS line drivers
  • Use part# ICE-LV2D-r5 when ordering for PIC5 or PIC6 series cards


ICE-GigEXD-r2 - $3100 for individual units, $3000 when order in a 1U chassis - $3100.00 In Production

  • Offers data translation from A/D, ECL, to standard GigE UDP Packets using the SDDS protocol
  • Optional, time code insertion is added to the SDDS header to time stamp packets
  • Time code sources include IRIG for A/D conversion ad Embedded Serial Time code from ECL units
  • A2D-r13 version = $3100 - PT# ICE-GigEXD-A2D-r13
  • DR2D Version = $3000 - PT# ICE-GigEXD-DR2D (Allows for LVDS, TTL, ECL, PECL Input)
  • 1U chassis Option = PT# ICE-1U-GIGEXD-4C for a 4-channel unit, or PT# ICE-1U-GIGEXD-2C for a 2-channel unit
  • Cost for 1U Chassis = $8,000 for 1U bare bones chassis + Number of channels at $3000 for each (Example - PT# ICE-1U-GIGEXD-4C would be $8000 + (4 x $3000) = $20,000)
  • For 1U units with 4 Channels or 2 Channels we can install up to 4ea Zeta high gain tuners (PT# Z0609). The tuners can be purchase directly from Zeta at a price of $9625, or we can purchase them and install them for you at no additional mark up cost.
  • Documentation: