Help: ICE_KEYS

This file covers all of the keyed parameters that one can set or get using the
pic_getKey() and pic_setKey() routines.  Unless specifically noted, all keys
are of type int_4.  

From Midas these can be called with:
  PICDRIVER GET <alias> <key> <label>
and 
  PICDRIVER SET <alias> <key> <value>

From C, Fortran, or Java code, the include file key name defines are formed by 
prepending KEY_ to the name of the key.

Many of these functions are also supported as flags in the configuration string
or /FLAGS=(string) switch.  See PIC HELP FLAGS.

The currently supported keys are:

  RATE - input sample rate in Hz
  FREQ - tuned frequency/nyquist (double)
  NFREQ - nearest actual tuned frequency/nyquist available
  DFREQ - channel spacing for tuner banks frequency/nyquist (double)
  DEC - tuner decimation (or frame decimation 1-1024)
  NDEC - nearest actual tuner decimation available
  GAIN - tuner gain in dB (must be set after loading user filter coeficients)
  OVSR - tuner over-sampling rate
  RATIO - tuner resampler ratio (resampleOutRate/tunerOutRate) (double)
  NRATIO - nearest actual tuner resampler ratio available (double)
  FRAME - frame size (32 <= 2**N <= 512K) for IOC framed decimation
  PKTLEN - packet length for tuner bank frames in bytes
  CHAIN - set DMA chain pointer to specified address
  ACTIVE - reports number of active DMA channels on card, -1 if not reset, -2 if locked
  DELAY - delay in some applications (in samples)
  TCMODE - TimeCode Mode index (debug)
  TCOFF - TimeCode sample Offset at start of DMA (debug)

  FLGBSET - set specified bits in the common flags
  FLGBCLR - clear specified bits in the common flags
  TFLGBSET - set specified bits in the tuner flags
  TFLGBCLR - clear specified bits in the tuner flags

  IPVLAN - set the IP VLAN address of an ethernet module
  IPADDR - set the IP address of an ethernet module
  IPCONN - connect to a particular IP multicast port
  IPDISC - disconnect from a particular IP multicast port
  PKTHDR - Return the contents of the last ICE/SDDS packet header.
  SEQERR - return the running count of SDDS sequence gaps
  SEQFILL - return the running count of SDDS sequence gaps filled by I/O processor.

  ALG - active algorithm (by index)
  ARGS - algorithm arguments offset

  CLKI - invert the clock
  MSBI - invert the Most Significant Bit
  BIT - bit# for bit serial acquisition (0,1,4,15)
  BITS - number of bits for acquisition (1,8,16)

  CTYPE - card type (2=PIC2 3=PIC3 4=PIC4 8=MBT2 9=MBT3 12=SLIC3)
  PTYPE - port type (1=SERIAL 2=LINK 3=MODULE 4=TUNER)
  PINDEX - port index 1,2,3,4...
  MTYPE - IO module type (-1=A2D 1=D2A -2=E2D 2=D2E etc..
  MTYPE1 - IO module#1 type
  MTYPE2 - IO module#2 type
  PMTYPE - processor module type (1=DTDM 2=DTDMX etc..
  PMTYPE1 - processor module#1 type
  PMTYPE2 - processor module#2 type
  MCHNS - maximum number of tuner channels on board 0-24
  CHNS - number of usable tuner channels 0-24 (uses CPC setting)
  CHAN - select channel in a tuner bank
  CPC - channels per chip to use 1|2|4 (graychips only)
  TCINC - adjacent tuner channel increment (to next tuner on same side)
  IOCTYPE - type of current IOC load module (i.e
  CBUFSZ - default buffer size on card for specified port
  ROUTE - current FPGA routing register

  PRCCLK - PRoCessor clock rate
  IOCCLK - IO Controller chip clock rate
  ICLK - IOC Internal divide clock rate (MUXCLK=I)
  PCLK - Programmable clock (MUXCLK=P)
  CCLK - Motherboard socketed crystal rate (MUXCLK=C)
  MCLK - Measurement of clock rate of the specified clock configuration

  PCICLK - PCI clock rate (33|66|100|133) MHz
  PCIBUS - PCI bus width (32|64) bits
  PCIBW - PCI bus bandwidth in Mby/s (theoretical)
  PCIREV - PCI controller chip EPROM rev
  DRIVER - ICE driver version running on this machine
  VERSION - ICE software version loaded on this card
  RSTIME - Time of last card reset (index=0) or I/O port reset (index=1|2) in J1950 seconds.
  PFIFO - PCI Side FiFo (debug)
  AFIFO - Card/Adon Side FiFo (debug)

  IOC - IOC registers
  IOCIOM - IOC IO Module control register
  IOCALG - IOC algorithm register offset
  IOCRAM - IOC RAM register offset

  MOD - module register offset

  CORE - processing core register offset

  APP - application register offset

  TPOE - test port output enable on series 5+ cards