Help: ICE_RELEASE_NEW_FEATURES

New Features (this release only)

  Version 3.2.0 adds /proc filesystem entry for mapped RAM allocation status
  Version 3.2.0 adds complex input to FPGA tuner/resampler core
  Version 3.2.0 adds PRESAMP flag to insert FPGA resampler in front of DTDM tuners
  Version 3.2.0 adds 3rd stage of Fast Tuner Transform on DTDM for max of 2048 channels
  Version 3.2.0 backport PIC5s 1PPS in bit 0 with independent A&B clocks to PIC4/MBT4
  Version 3.2.0 adds FIRONLY flag to PIC5 tuner to implement a 63 tap real filter at 64MHz SR (or 127@32MHz)
  Version 3.2.0 adds ITCPC and ITFMT for graychip tuners (PIC4/MBT4/MBT5)
  Version 3.2.0 adds timecode calibration for tuner bank outputs with FTTM=1|2|3
  Version 3.2.0 adds 64G memory addressing for PIC5+ cards
  Version 3.2.0 adds support for mapping ram files > 2G (NeXtMidas Only)
  Version 3.2.0 adds preliminary support for PIC6