Help: ICE_RELEASE_NONVOLATILE

Non-Volatile EEPROM Signatures for Series-5 Cards

The Series-5 cards use a reprogrammable Flash to allow field upgrades to the PCI interface.
To insure the EEPROM still contains only the baseline code from ICE, a procedure is provided
to read-back the EEPROM contents and calculate its 32-bit CRC.  The current baseline CRCs are:

  ICEPIC5_SS CRC32=0x6b63b438
  ICEPIC5_DD CRC32=0x9137d8c9
  ICEPIC5_HH CRC32=0xa7b4fa15
  ICEPIC5_SH CRC32=0x04f94617

  ICEPIC6_SS CRC32=0x46690492
  ICEPIC6_HH CRC32=0x28ee03df

To readback the CRC from a midas account, run 
  nM> PICD CHECKFLASH <device>

From outside Midas, run the test function
  >$ICEROOT/test/test pic # checkflash
where # is the 0 based index of the ICE cards in the system.
See the $ICEROOT/test/readme.txt file to build the test executable (if not previously built).

When upgrading to a new software release, the EPROM will need to be flashed with the new 
release.  See the HELP on SOC for more information on the correct download for your card.

To program the flash with newer code from a midas account, run 
  nM> PICD LOADFLASH <device> <loadfile>

From outside Midas, run 
  >$ICEROOT/test/test pic # loadflash <loadfile>

where <loadfile> is an appropriate device file, like ICEPIC5_SS or ICEPIC5_HHR.
Make sure ICEROOT is defined properly. Files are read from $ICEROOT/dat/ .

You need to reboot the system for the card to load the new FPGA code.
Make sure the procedure returns zero errors before rebooting your system.
If you reboot with errors, the card will be lost to the PCI bus, and you 
will need to send it back to the factory.